Electrical & Computer Engin 697VS - ST-Hardware Verif/SymbolicComp

The course covers modern decision procedures for formal hardware verification based on SAT solvers, decision diagrams and those based on computational algebraic geometry. Equivalence and property checking applications are covered. Students learn the development and application of computer-aided verification (CAV) tools to control and datapath-dominated hardware designs. Homework assignments consist of theory, application and CAV tool development projects.

Open to Graduate students only.