Electrical & Computer Engin 662 - HardwareDesign/MachLrngSyst

This course studies architectural techniques for efficient hardware design for machine learning (ML) systems including training and inference. Course has three parts. First part deals with convolutional and deep neural network models. Second part deals with parallelization techniques for improving performance of ML algorithms. Last part deals with hardware design involving various acceleration techniques for improving computational efficiency of ML kernels including locality, precision in matrix multiplication and convolution; role of batch size, regularization, precision and compression in design space trade-off for efficiency vs accuracy; evaluation of performance, energy efficiency, area, and memory hierarchy.

Open to Seniors and Graduate E&C-ENG majors only.